Most electronics systems include multiple devices communicating with one another via a connection, such as conductive traces on a printed circuit board on which the devices are mounted or conductive traces connecting different areas of an integrated circuit on a single die. While the various devices included in an electronics system may be internally operating at different speeds, the communications that occur between the devices may be operating based on a system clock. This system clock may determine input/output (I/O) speeds of the host system and may also be limited by the slowest device in the system. For some devices, a logic device for example, a fast system clock may pose no problems because the internal components of the device, e.g., transistors, may operate based on a higher clock rate than the system clock. For other devices, however, a system clock that begins to reach their maximum internal operating speeds begins to pose problems for I/O operations.
The differences between the internal operating speeds of the various devices may be influenced by their respective fabrication processes. For example, a logic fabrication process used to fabricate logic devices e.g., systems on a chip, processors, controllers, etc.) may be optimized for operating speed. The logic fabrication process optimized for operating speeds may thus produce transistors and circuits that are capable of performing at high clock rates. The fabrication process therefore provides fast transistors that may display fast switching times and sharp slew rates. The transistors may also be more sensitive to input voltage changes. Accordingly, devices built on logic fabrication processes may have sensitive input circuits that are capable of detecting input signals characterized by small voltage swings. Further, output circuits of these devices may be capable of driving signals of large voltage swings at fast slew rates.
Other devices, on the other hand, may have comparatively slower transistors, which may result in comparatively slower internal operating rates and I/O rates. Memories, for example, may be fabricated using a memory fabrication process that is optimized for data retention, not transistor speed. Consequently, the transistors built on a memory fabrication process may require larger voltages for enabling/disabling transistors and which may drive signals at comparatively slower slew rates, for example. As such, the input circuits may require input signals of larger voltage swings compared to logic devices so that the inputs are reliably detected. Further, the output circuits may drive large voltage swing signals at comparatively slow slew rates. Because the input and output circuits are similarly processed, they may conventionally be designed to detect and transmit signals of similar voltage swings. As a consequence, a maximum I/O rate the output circuits are capable of reaching may be limited due to the slew rate.
At higher I/O rates, a memory output circuit may not be able to reach the designed output voltage swing due to the limited slew rate during a clock cycle. As such, a device receiving outputs from the memory, e.g., a memory controller or a system on a chip, may not receive reliable signals at those higher I/O rates.